1. Field of the Invention
This invention relates generally to a semiconductor device and a method of manufacturing the same and, in particular, to a method of manufacturing semiconductor devices having a thin film formed on an insulating support, such as a substrate or support layer, and, further, to the formation of thin film transistors (TFTs) on insulating supports for large area image arrays, such as liquid crystal display panels.
2. Description of the Related Art
Studies and experiments have been performed to form a high quality semiconductor films, devices, and IC structures on insulating supports, such as, insulating substrates, for example, glass, quartz, or the like and on amorphous layers, for example, SiO2, Si3N4, and the like.
In recent years, expectations and desires for improved high quality semiconductor silicon devices and IC structures formed on these insulating supports has continually increased. Examples of applications are large area, high resolution liquid crystal display panels and devices; high speed, high resolution contact type image sensors; three dimensional ICs, and other IC structures. Therefore, the development of a method that will consistently and reliably form high quality silicon thin films on an insulating support is under intensive research and development.
Relative to semiconductor materials, a polycrystalline or polysilicon silicon TFT device has a higher field effect mobility than an amorphous silicon TFT device and the amount of ON current of a polysilicon TFT is much greater than that of an amorphous TFT. However, the mobility of present polysilicon TFTs is still lower than that of monocrystalline TFT devices because of many barriers around the boundaries of crystal gains in the polysilicon material. In the case of the above mentioned applications, it is highly desirable to increase the level of mobility of polysilicon TFT devices to approach that of monocrystalline silicon. In order to obtain such higher levels of mobility in polysilicon TFT devices, the grain size diameter of the polysilicon should be increased from around 500 xc3x85 to several 1,000 xc3x85, which is in the range of reproducibility in the present state of the art, to about 1 xcexcm or greater.
Relative to the formation of thin film transistors (TFTs) on insulating structures, the following general methods have been studied and developed: (1) The formation of TFTs employing amorphous silicon as the semiconductor material fabricated by plasma CVD or low pressure chemical vapor deposition (LPCVD) or a similar process, (2) TFTs employing polycrystalline silicon as the semiconductor material fabricated by chemical vapor deposition (CVD), LPCVD, plasma enhanced chemical vapor deposition (PECVD) or similar process, and (3) TFTs employing single crystal or monocrystallized silicon as the semiconductor material fabricated by melting recrystallization or such similar process. However, the realization of high quality TFTs has been very difficult because the field effect mobility of TFTs comprising amorphous silicon or polycrystalline silicon is substantially lower than that of TFTs comprising single crystal silicon. For example, relative the conventional methods of (1) and (2), the field effect mobility for amorphous silicon TFTs is typically below 1 cm2/Vxc2x7sec and for conventional polycrystalline silicon TFT is approximately or less than 10 cm2/Vxc2x7sec. Thus, high speed operational characteristics have not been realized by the employment of these methods. On the other hand, in the case of the method (3), melting recrystallization, wherein a laser beam is utilized to bring about recrystallization, higher mobilities have been achieved, such as in the hundreds of cm2/Vxc2x7sec. However, there are problems associated with this technique due to the use of very high temperatures in processing and, furthermore, the technique has not been sufficiently developed to lend itself to mass production of semiconductor devices, particularly, the mass production of hundreds to thousands of active elements on a large area insulating supports, such as glass substrates for large area image devices, e.g., liquid crystal display panels.
Recently, the method of forming large grain polycrystalline silicon layers or films by solid phase recrystallization has been pursued and research employing this method has been proceeding in recent years. One of the principal reasons for the interest in solid phase recrystallization is the advantage in using lower processing temperatures compared to melting recrystallization. Examples of studies relating to solid phase recrystallization processing are found in the articles of P. Quizzer et al., xe2x80x9cAnnealing Behavior of Thin Polycrystalline Silicon Films Damaged by Silicon Ion Implantation in the Critical Amorphous Rangexe2x80x9d, Thin Solid Films, Vol. 100(3), p. 227-233, (1983), and T. Noguchi et al., xe2x80x9cLow Temperature Polysilicon Super-Thin-Film Transistor (LSFT), Japanese Journal of Applied Physics, Vol. 25(2), p. L121-L123, February, 1986 and in U.S. Pat. No. 4,693,759.
Generally, the conventional method of solid phase recrystallization relative to the formation of TFTs and other such active elements is that, first, a polycrystalline silicon film is formed by LPCVD or PECVD employing SiCI4, SiH4 or the like. Next, the polycrystalline silicon film is amorphized by a Si+ ion implantation. Then, the converted amorphous film is heat treated, for example, at approximately 600xc2x0 C. in a nitrogen atmosphere in excess of 30 hours and, preferably nearly 100 hours to produce large gain polysilicon. Finally, the polysilicon film is patterned into a TFT device using conventional photolithography techniques. However, the practice of this method has the following disadvantages: (1) The process is complicated by the requirement that the formed polycrystalline silicon layer must be amorphized before further treatment, which naturally increases manufacturing costs. (2) This amorphization is accomplished with expensive ion implantation system, which is necessary to perform the implantation operation. (3) The required heat treatment period is comparatively a very long period of time, in many cases as long as nearly 100 hours to achieve the largest grain size possible. (4) It is very difficult to handle large insulating substrates, such as, for example, 30 cmxc3x9730 cm, and obtain uniform results across a deposited and heat treated thin film on such a substrate. (5) The crystallized volume fraction, i.e., the crystal to overall volume ratio in the recrystallized film, is low after performing solid phase recrystallization. Therefore, it is very difficult to fabricate a high quality active elements on large area substrates employing conventional methods of solid phase recrystallization.
It is an object of this invention to provide a low temperature method of forming polycrystalline thin films on an insulating support having high polycrystalline quality, larger crystal grains and good crystal grain orientation.
It is another object of the present invention to provide semiconductor devices, such as TFTs, having high speed operational characteristics and higher field effect mobility compared with such devices made by conventional methods.
It another object of this invention to provide a semiconductor device which comprises a polycrystalline silicon thin film formed on an insulating support characterized by large grains, high crystallized volume fraction and reduction of the Si/SiO2 interface state density.
It is another object of this invention to provide a method for the manufacture of a thin film polysilicon semiconductor that is simpler in implementation with resulting higher manufacturing reproducibility and yields compared to prior conventional methods.
It is still a further object of this invention to provide a polysilicon thin film on an insulating medium having high field effect mobility suitable for large are IC applications, such as large area TFT arrays for LCD panels.
According to this invention, an improved polycrystalline or polysilicon film having large grain size, such as, 1 xcexcm to 2 xcexcm in diameter or greater, is obtained over the methods of the prior art by initially forming a silicon film, which may be comprised of amorphous silicon, or micro-crystalline silicon, or contains micro-crystal regions in the amorphous phase (hereinafter also referred to as xe2x80x9cnoncrystallinexe2x80x9d), at a low temperature via a chemical vapor deposition (CVD) method, such as by plasma chemical vapor deposition (PCVD) with silane gas diluted with, for example, hydrogen, argon or helium at a temperature, for example, in the temperature range from temperature 600xc2x0 C. This is followed by solid phase recrystallization of the film to form a polycrystalline film which is conducted at a relatively low temperature in the range of about 550xc2x0 C. to 650xc2x0 C. in an inert atmosphere, e.g., N or Ar, for a period of about several hours to 40 or more hours preferably the temperature is gradually increased, e.g., at a temperature rise rate below 20xc2x0 C./min, preferably about 5xc2x0 C./min, to a prescribed recrystallization temperature within the range about 550xc2x0 C. to 650xc2x0 C.
Further, between the step of forming the film and the step of solid phase recrystallization, the film may be thermally treated at a relatively low temperature, e.g., over 300xc2x0 C. and preferably between approximately 400xc2x0 C. to 500xc2x0 C. for a period of several minutes, such as 30 minutes, to remove most of the hydrogen from the film prior to recrystallization, since hydrogen included in the silicon film disturbs and suppresses the formation of large crystal grain sizes during subsequent solid phase recrystallization treatment to form a polycrystalline film. Also, if the formation of the noncrystalline film by CVD deposition is carried at a substrate temperature in the range of about 150xc2x0 C. to 200xc2x0 C. which is particularly desirable, during the process of solid phase recrystallization, larger crystal grains will be formed and the possibility of release of the film from the substrate is less likely to occur. The prepared polycrystalline film may then be utilized for TFT gate electrodes. After formation of the gate oxidation layer, the gate electrode may be formed, followed by formation of defined source and drain regions to complete the manufacture of a TFT device. The resultant field effect mobility of an n channel, polycrystalline silicon TFT formed in accordance with the method of this invention is 150 cm2/Vxc2x7sec to 200 cm2/Vxc2x7sec and greater.
Further, the method of this invention comprises the thermal oxidation of a polysilicon film to form a gate oxidation layer or file on it surface wherein the temperature is increased gradually, e.g., below about 20xc2x0 C./min, preferably at about 5xc2x0 C./min, to the thermal oxidation temperature in the range of about 1,000xc2x0 C. to 1,200xc2x0 C.
Thus, polycrystalline silicon films with large grains and high crystallized volume fraction can be produced by employing a simpler manufacturing process. As a result, it is possible to form high quality semiconductor active elements on insulating materials, thereby making it possible to produce large size, high resolution liquid crystal display panel; high speed, high resolution contact type image sensors; three dimensional ICs; and the like.
Also, according to the method of this invention, there are following additional attributes. In the case of an undoped channel region in the past, it was necessary to dope the impurity, for example, boron, in the channel region via ion implantation, since the characteristics of the active region of an n channel polycrystalline silicon TFT tend to shift to the depletion side, and of a p channel polycrystalline silicon TFT to the enhancement side. On the other hand, according to this invention, since a doped polycrystalline silicon layer can be obtained by doping impurities, such as boron or the like, at the time of film growth and, then, thereafter solid phase recrystallization performed on the doped film, employment of expensive equipment, such as an ion implantation system, is not necessary and, further, there is no necessity to increase the number of processing steps, which is a cost effective advantage. For example, if an impurity in the concentration range of about 1015/cm3 to 1019/cm3 are doped at the channel region prior to formation of the gate electrode of TFT device, this shift in Vth can be suppressed so that impurities in channel region can be employed to control threshold voltage, Vth and minimize cut off current. Alternatively, by doping impurities during the film growth prior to solid phase recrystallization in order to control Vth, an increased ON current for p channel TFT""s can be obtained beside minimized cut off current.
Also, according to the method of this invention, reduction of gate interconnect resistance can be easily achieved with a simple treatment process. High gate interconnect resistance has been a problem in active TFT, large LCD panels and this resistance can be reduced by the practice of this invention more easily enabling the fabrication of liquid crystal display panels with applicability also to HDTV panels. Further, this invention is also effective as applied to a contact type image sensors wherein the scanning circuit and electro-optic transducer are integrated on a single substrate achieving higher read scan rates and higher resolution. It is possible to make a wider contact type image sensor because of the reduction of the gate interconnect resistance enabling larger size image sensors. For example, a high speed scanner with a contact type image sensor having an electro-optic transducer and scanning circuit integrated in a single chip manufactured according to this invention can have a scanning rate equal to or in excess of 1 ms/line, in the case of an A4size scanned medium, and having a resolution of 400 DPI or greater. Also, this circuit can be operated at lower source voltage levels of about 5 V to 10 V compared to previous levels of about 16 V. By the same token, application of this invention are also easily applicable to TFT driven liquid crystal shutter arrays, TFT driven thermal heads, three dimensional ICs or the like.
Further, polycrystalline silicon films with large grains can be formed by employing shorter thermal treatment periods by a combination of films wherein one film crystalline seeds are easily generated by solid phase recrystallization and in another film crystalline seeds are difficult to generate by solid phase recrystallization. Further, by forming a film wherein crystalline seeds are easily generated by the employment of a relatively high temperature plasma CVD process, polycrystalline silicon with large grains with uniform direction of orientation, such as  less than 110 greater than , or silicon with small crystalline grains in the amorphous phase can be achieved with a thermal treatment of a relatively short duration. As a result, improvements in field effect mobility and reduction of Si/SiO2 interface state density are realized in the employment of this invention. In particular, two different silicon films are formed by plasma CVD method on the same support wherein one film is formed at a relatively higher temperature, e.g., in the range of about 400xc2x0 C. to 800xc2x0 C. in order to possess a relatively high polycrystalline seed generation rate, and another film is formed at a relatively lower temperature, e.g., in the range of about 150xc2x0 C. to 300xc2x0 C., in order to possess a relatively low polycrystalline seed generation rate. Thus, the polycrystalline seed generation ratio of the latter film is lower than that of the former film. This enables a polycrystalline film to be formed by solid phase recrystallization in a relatively short thermal treatment period that has large crystal grain sizes. The role of the crystalline seeds is to lower activation energy of transforming amorphous to crystalline silicon thereby rendering a shorter annealing time and to control crystal orientation of the formed polycrystalline silicon film. The field effect mobility of a high temperature processed n channel TFT manufactured according to the method of this invention is greater than about 200 cm2/Vxc2x7sec, thereby providing for a high quality TFT.
Other objects and attainments together with a fuller understanding of the invention will become apparent and appreciated by referring to the following description and claims taken in conjunction with the accompanying drawings.